Low temperature, single side, multiple step etching process for fabrication of small and large structures

DETAILED DESCRIPTION It is an object of this invention to improve processes for forming fine structures in the surface of silicon wafers by etching processes.
It is another object of this invention to produce both large and fine structures on silicon wafers by etching.
It is a further object of the invention to improve uniformity of channel formation in ink jet channel plates and avoid potential defects arising from high temperature mask formation.
These and other objects are achieved, and the shortcomings discussed above are overcome, by using a single side, two step, process wherein a first pattern incorporating fine structure(s) and large structure(s) are removed from layers of a first fine masking layer and a second, protective, masking layer previously deposited on the wafer.
A coarse masking layer is then deposited and a second pattern, within the boundaries of the first pattern is removed therefrom.
The applications of the first, second, and third masking layers are carried out at temperatures below the range in which oxygen precipitates are formed in the wafer.
The wafer is etched through the second pattern to form a precursor to the large structure.
The coarse masking layer, and optionally the protective masking layer, are stripped prior to final etching, during which fine structures are formed in the wafer and the large structure is fully etched.
The protective masking layer protects the first masking layer from removal at the time the third masking layer is removed, prior to the final etching step.