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 Method of fabricating bipolar transistors and insulated gate field effect transistors having doped polycrystalline silicon conductors

Details
Inventors: Homma, Hideo; Misawa, Yutaka; Momma, Naohiro;
Assignee: Hitachi, Ltd. (Tokyo, JP)
Primary Examiner: Ozaki; George T.
Assistant Examiner:
Attorney, Agent or Firm: Antonelli, Terry & Wands

A method of fabricating a semiconductor device includes the steps of: forming at least one first semiconductor region of a first conductivity type and at least one second semiconductor region of a second conductivity type in a main surface of a semiconductor layer of the first conductivity type; forming a three-layer film having a desired shape on each of the first and second semiconductor regions, the three-layer film being made up of a bottom layer which is a conductive film, an intermediate layer which is a silicon nitride film, and a top layer which is a polycrystalline silicon film doped with one of arsenic and phosphorus; forming a first insulating layer on the side wall of the three-layer film; forming a second polycrystalline silicon film on the whole surface, and diffusing one of arsenic and phosphorus from the first polycrystalline silicon film into the second polycrystalline silicon film; selectively etching off the first polycrystalline silicon film and that portion of the second polycrystalline silicon film, in which one of arsenic and phosphorus has been diffused; forming a second insulating layer at least on the surface of the portion of the second polycrystalline silicon film which exists on the second semiconductor region; removing the silicon nitride film and the conductive film which exist on the second semiconductor region, while using the second insulating layer as a mask, to form an aperture; and forming a third polycrystalline silicone film so that the aperture is covered by the third polycrystalline silicon film.

DETAILED DESCRIPTION It is an object of the present invention to provide a method of fabricating a bipolar transistor device, an MOSFET device or a composite device made up of a bipolar transistor and an MOSFET which method can overcome the above-mentioned drawbacks of the prior art.
Accordingly to an aspect of the present invention, there is provided a method of fabricating a semiconductor device comprising the steps of: forming a layered structure of a desired pattern on a main surface of a single crystal semiconductor layer of one conductivity type, the structure having a side wall which defines said pattern and including a lower layer disposed at a lower level, a first insulating layer disposed at an intermediate level, and a first polycrystalline semiconductor layer heavily doped with n-type impurity and disposed at a higher level; forming a second insulating layer on the side wall of the layered structure; forming a second polycrystalline semiconductor layer on exposed surfaces of said single crystal semiconductor layer, said first polycrystalline semiconductor layer of the layered structure and said second insulating layer; diffusing said n-type impurity in said first polycrystalline semiconductor layer of the layered structure into part of said second polycrystalline semiconductor layer disposed contiguous to the first polycrystalline semiconductor layer; selectively etching away said part of the second polycrystalline semiconductor layer diffused with said n-type impurity and said first polycrystalline semiconductor layer, using said first and second insulating layers as an etching stopper; doping the remaining part of said second polycrystalline semiconductor layer with conductivity-affording impurity; and heat-treating the device to drive the doped impurity in said second polycrystalline semiconductor layer to a surface region of said single crystal semiconductor layer, thereby forming a doped surface region in the single crystal semiconductor layer and a doped polycrystalline semiconductor layer electrically connected to said doped surface region and extending therefrom



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