Ion selective electrodes |
| The invention is applicable to ion selective electrodes other than potassium electrodes, and it is ... |
|
Potassium ion-selective electrode |
| OF THE INVENTION The dry-operative potassium ion-selective electrode comprises: (a) a metal/metal ... |
|
Device for determining ionic analyte activity |
| OF THE INVENTION Although the invention as described hereinafter is directed to a device for ... |
|
Membrane for an electrochemical measuring electrode device |
| We claim: 1. A membrane for an electrochemical measuring electrode device for polarographically ... |
|
Cathodic protection anode and systems |
| A continuous length anode is formed of relatively small valve metal wire having a electrocatalytic ... |
|
FET type sensor and a method for driving the same |
| The FET type sensor of this invention which overcomes the above-discussed and numerous other ... |
|
Sensor |
| The sensor of this invention which overcomes the above-discussed disadvantages and other numerous ... |
|
Flammable-gas sensor |
| In order to accomplish the objects stated above, according to one embodiment of the present ... |
|
Specimen transporting and processing system |
| The present invention is an improvement over prior art devices, and relates to a specimen ... |
|
Complementary field effect transistor and method of forming the same |
| In order to achieve the above-specified object, according to the present invention, there is ... |
|
|
Method of making an E.sup.2 PROM cell with improved tunneling properties having two implant stages
| Details |
Inventors: Chang, Kuang-Yeh; Nariani, Subhash R.;
Assignee: VLSI Technology, Inc. (San Jose, CA)
Primary Examiner: Hearn; Brian E.
Assistant Examiner: Chaudhari; C.
Attorney, Agent or Firm: Burns, Doane, Swecker & Mathis
The present invention is directed to a semiconductor memory device and a method for fabricating a semiconductor memory device, in particular a E.sup.2 PROM, having an improved tunnel area wherein electrons travel to and from a floating gate. The tunnel area is characterized by properties which lend to a relatively large number of programming and erasure cycles over the life of the E.sup.2 PROM. The tunnel area includes a tunneling gate which is fabricated via two implant stages. Because these two stages are separate from one another, each of the implant stages can be independently optimized to improve the properties of the tunnel area. Further, the windows used to define the implant regions are easily fabricated and are designed to facilitate formation of the implant regions. The method of defining the window lends to easy scaling of the process for advancing generations of technology. |
|
DETAILED DESCRIPTION The present invention is directed to a semiconductor memory device and a method for fabricating a semiconductor memory device, in particular an E. sup. 2 PROM, having an improved tunnel area wherein electrons travel to and from a floating gate of the E. sup. 2 PROM cell. An E. sup. 2 PROM cell designed in accordance with the invention includes a tunneling gate fabricated via two implant stages. Because these two stages are separate from one another, each of the implant stages is independently optimized to improve the properties of the tunnel area. These properties enhance operating efficiency of the memory device, and extend the operating life of the memory device. Further, the windows used to define the implant regions are easily fabricated and provide for easy control of etching. More particularly, the two separate implant regions permit two separate doses of different materials to be implanted in the tunnel gate. For example, in a first outer implant region of the tunnel gate, the dose can be increased to reduce resistance. On the other hand, a second region of the tunnel gate under the thin tunnel oxide layer can be formed with a decreased dose to reduce leakage of the tunnel oxide during normal operation of the memory cell. In establishing windows to define the implant regions, the same mask used to fabricate an active area of peripheral transistors (e. g. , select transistors) can be used to define a first implant region. Further, a relatively large window can be used to establish a second implant region. This relatively large window can be defined with a wide tolerance without concern that over-etching will damage the substrate. In accordance with a preferred embodiment, a method for fabricating a cell for use in a semiconductor memory device such an E. sup. 2 PROM includes the steps of forming a first oxide layer of varying thickness on a semiconductor substrate, the oxide layer having a first portion formed of a first thickness and a second portion formed of a second thickness greater than said first thickness
|
| Related patents |
|
|
Short channel MOS devices and the method of manufacturing same
What I claim is: 1. In an improved semiconductor device having a body of semiconductor material of a first conductivity type; first and second regions of an opposite ...
|
|
|
Integrated CMOS process with JFET
We claim: 1. In a CMOS integrated circuit wafer treatment process, the additional steps for creating a JFET comprising: starting with a semiconductor wafer of a first ...
|
|
|
Vertical MOSFET having a proof structure against puncture due to breakdown
An object of the present invention is to provide a vertical MOSFET in which the breakdown current caused by a surge or the like does not converge to a limited part ...
|
|
|
Semiconductor memory device
In view of the foregoing, an object of the present invention is to provide a semiconductor memory device which is improved in the arrangement of the memory cells, in ...
|
|
|
Electrochemical gauge for oxygen having an internal reference and solid electrolyte
However, it has now been established that it is possible to overcome, at least to a large extent, the disadvantages of such known gauges by using as the internal ...
|
|
|
Metallic modified material of intermetallic compound and a process for the production of the same
OF THE INVENTION In accordance with the present invention, there is provided a metallic modified material (metallic modifications) of intermetallic compound, which has ...
|
|
|
Double photoelectrochemical cell for conversion of solar energy to electricity
According to one aspect of the invention, there is provided a device for converting electromagnetic radiation, preferably sunlight, directly to electricity. It includes ...
|
|
|
Ion exchange membrane cell and electrolysis with use thereof
OF THE PREFERRED EMBODIMENTS The gas and liquid permeable porous layer provided on the cation exchange membrane according to the present invention is formed preferably ...
|
|
|
Incubator and analyzer with improved cap raising means
I have devised an incubator that solves the above-noted space problems and complexities of the prior art incubators. More specifically, there is provided an incubator ...
|
|
|
Thin film electrochemical electrode and cell
What I claim is: 1. An electro-chemical cell comprising: a. a conducting substrate having a first face having a first thin film insulating layer thereon, b. said first ...
|
|
|