Method of semiconductor manufacture using an inverse self-aligned mask

DETAILED DESCRIPTION In accordance with the present invention, a novel method for forming an inverse self-aligned mask for the manufacture of CMOS semiconductor devices is provided.
The method of the invention includes the steps of: depositing a maskable material on a substrate; forming a pattern of openings on the maskable material using a photolithographic process to define and expose a pattern of areas (or regions) on the substrate which may be tailored for a semiconductor device as required; depositing a second material over the maskable material and over the pattern of areas on the substrate; polishing the second material to an endpoint of the maskable material in order to define a second patterned layer on the substrate; and selectively removing the first material in order to expose a second pattern of areas on the substrate which may also be tailored for a semiconductor device as required.
As an example, the method of the invention may be used to implant N-wells and P-wells on a CMOS device, such as the prior art structure 10 shown in FIG.
1.
This method simplifies processing because a separate mask is not required during formation of the separate N-channel and P-channel devices on the substrate.
Additionally, the separate N-channel and P-channel devices are self-aligned with one another during formation of the mask of the invention.
Finally, the method of the invention permits more devices to be located in a given chip area because less surface area on the chip needs to be dedicated to mask formation.
Other objects, advantages, and capabilities of the present invention will become more apparent as the description proceeds.