Process for fabricating a control gate for a floating gate FET

DETAILED DESCRIPTION It is therefore, an object of the present invention to provide an improved method of fabricating a floating gate field effect transistor.
A further object of the present invention is to provide a method of fabricating a floating gate FET having a multi-layer control gate including a highly doped polysilicon layer adjacent to the inter-gate oxide.
Another object of the present invention is to provide a method of fabricating a floating gate FET having a multi-layer control gate which improves the adhesion of a silicide layer to an underlying polysilicon layer.
Another object of the present invention is to provide a method of fabricating a multi-layer conductive line with a single vacuum chamber pump down.
A process for fabricating a floating gate field-effect transistor in accordance with the present invention comprises the steps of (a) providing a gate oxide on the substrate, (b) providing a floating gate line on the gate oxide, (c) providing an intergate oxide layer overlying the gate oxide and the floating gate line, (d) providing control gate layers, including a first undoped polysilicon layer overlying the intergate oxide layer, a silicide layer overlying the first polysilicon layer, and a second undoped polysilicon layer overlying the silicide layer, (e) annealing the control gate layers in an environment including POCl.
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3, (f) etching the control gate layers to form a control gate line, (g) etching the floating gate line using the control gate line as a mask to form a floating gate, and (h) implanting source and drain regions using the control gate line as a mask.