Semiconductor memory device

DETAILED DESCRIPTION In view of the foregoing, an object of the present invention is to provide a semiconductor memory device which is improved in the arrangement of the memory cells, in electrical connection structure and in the structure of the capacitor region.
A semiconductor memory device in accordance with the present invention comprises: a semiconductor substrate having a main surface; and four memory cells arranged in point symmetry on the main surface, each of the memory cells comprising one transistor having a source region formed around the point of symmetry and a drain region formed therearound, and one capacitor adjacent to the outside of the drain region, the capacitor comprising a surface capacitor region parallel to the main surface of the substrate and a trench capacitor region parallel to a side wall of a trench formed in the main surface of the substrate along the outer periphery of the surface capacitor region, and the the semiconductor memory device further comprises an insulating layer covering the memory cells and having one contact hole arranged on the center of the point symmetry, with the contact hole enabling electrical connection to the source region of each transistor.
In the semiconductor memory device in accordance with the present invention, transistors arranged in point symmetry around one contact hole are surrounded by respective capacitors formed adjacent to the outside thereof.
Therefore, the trench capacitor region of each capacitor is not opposed to the transistor region in the vicinity, whereby a highly integrated semiconductor memory device of high performance can be provided without affecting the characteristics of the transistors.
These object and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.