Semiconductor structure having multiple levels of self-aligned interconnection metallization, and methods for its preparation

DETAILED DESCRIPTION In view of the needs described above, an improved semiconductor structure has been discovered.
It includes at least one stud-up and an interconnection line connected thereto wherein the stud-up and interconnection line are formed from a single layer of metal.
The structure is prepared by an inventive method comprising the following steps: An improved method for preparing a semiconductor structure which includes at least one stud-up and at least one interconnection line connected to the stud-up, wherein the stud-up and the interconnection line are self-aligned, and are formed from a single layer of metal; said method comprising the following steps: a) providing an insulator region on a semiconductor substrate; b) patterning and etching the insulator region with a mask to define at least one opening having a pre-selected depth; c) depositing metal to fill the opening, thereby forming the interconnection line; and d) patterning and then forming a stud-up of desired dimensions within the metal-filled opening, the lower end of said stud-up being connected to the interconnection line, and the upper end of said stud-up terminating at or near the upper surface of the insulator region.
Other embodiments of the invention include at least one stud-down, also formed from the single layer of metal.
A method to form the stud-down in conjunction with the interconnection line and the stud-up is also provided below.
In another optional embodiment, an endpoint detection technique is used to precisely control the height of the stud-up and the width of the interconnection line.