Home | Links | Contact Us | More About Intellectual Property | Bookmark
Search patents:
Home Semiconductor manufacture Stress-insensitive-integrated-circuit

 Photoconductive layer having hydrophilic and hydrophobic moieties
An object of the present invention is to provide a photosensitive member, in particular, an ...


 Immunoassay for CK-MB using bound and soluble antibodies
I claim: 1. An immunoinhibition assay for CK-MB comprising the steps of: (a) forming a first ...


 Layer of metallomacrocyclic polymer on substrate
We claim: 1. A layer element which comprises a base having a hydrophobic surface and, applied on ...


 Immunoassay device for continuous monitoring
In accordance with the present invention, there is provided a device for detecting the presence of ...


 Lyophilized ligand-receptor complexes for assays and sensors
Accordingly, it is one object of the present invention to provide novel ligand-receptor complexes ...


 Erasable optical memory and method
The present invention seeks to provide a novel optical memory system, and associated fabrication ...


 Method for the particularly sensitive detection of nucleic acids
We claim: 1. A method of detecting a target nucleic acid A, comprising: a) hybridizing the target ...


 Sensitive immunoassays utilizing antibody conjugates with replicable DNA templates
Aspects of this invention revolve around antibody-variant DNA conjugates that are immunoassay ...


 Analyte detection assay and methods of use
OF THE PREFERRED EMBODIMENTS In a preferred aspect of this invention, the invention relates to a ...


 Heterdoyne Thickness Monitoring System
A Chemical Mechanical Polishing heterodyne in-situ sensor (C-HIS) apparatus and method for enhanced ...


 Stress insensitive integrated circuit

Details
Inventors: Culmer, Daniel D.; Cometta, Robert A.;
Assignee: National Semiconductor Corporation (Santa Clara, CA)
Primary Examiner:
Assistant Examiner:
Attorney, Agent or Firm:

An integrated circuit includes a plurality of circuit elements interconnected to operate as a circuit and formed in a common semiconductor substrate. The substrate is mounted on a supporting package, resulting in a mechanical stress in the substrate which is symmetrical about at least one given axis. At least the circuit elements with operating characteristics which are altered by the mechanical stress and which have a critical matching or ratio relationship are arranged symmetrically about the stress axis of symmetry. In a preferred form, the integrated circuit is a linear circuit, such as an operational amplifier employing junction field effect transistors (JFETs) for its input stage and bipolar transistors for its amplifier stage. Providing device symmetry about an axis of mechanical stress symmetry enables shifts in input offset voltage for such operational amplifiers to be reduced up to a factor of about 10.

DETAILED DESCRIPTION Accordingly, it is an object of this invention to provide an improved integrated circuit structure in which changes in circuit performance induced by mechanical stresses of the structure are minimized.
It is a further object of the invention to provide a technique for incorporating critical circuit elements of a normally stress-sensitive type into an integrated circuit without making the integrated circuit stress sensitive.
It is another object of the invention to provide an integrated circuit including surface effect devices which is not sensitive to mechanical stresses induced in packaging the circuit.
It is yet another object of the invention to provide linear integrated circuits including circuit elements with a critical matching or ratio relationship and which are subject to performance changes due to mechanical stress, in which the matching or ratio relationship is maintained despite changes in the mechanical stress of the integrated circuit after the critical circuit elements have been fabricated.
It is still another object of the invention to provide an operational amplifier integrated circuit including a JFET input stage having a substantially reduced input offset voltage shift produced by packaging the integrated circuit.
The attainment of these and related objects may be achieved through use of the novel integrated circuit disclosed herein.
An integrated circuit in accordance with the invention includes a plurality of circuit elements interconnected to operate as a circuit and formed in a common semiconductor substrate.
The semiconductor substrate is mounted in a supporting package.
As a result of being mounted in the package, the semiconductor substrate has a mechanical stress which is symmetrical about at least one given axis.
At least those of the circuit elements with operating characteristics which are altered by mechanical stress are arranged symmetrically about at least one given axis.
In particular, transistor and resistor pairs which interact in operation of the circuit and which require a matched or ratio relationship between them are arranged in corresponding positions on either side of the axis of mechanical stress symmetry



Related patents
  Hall-type transducing device
In designing a Hall-type transducer to operate in conjunction with a comparatively small, ferrite-composite magnet, between "ON" and "OFF" states over a wide range of ...
  Topography for integrated circuit operational amplifier having low impedance input for current feedback
Accordingly, it is an object of the invention to provide an integrated circuit chip topography for a high speed amplifier with a low impedance input to allow use of ...
  Operational amplifier with stabilized DC operations
Embodiment 1 FIG. 1 shows a first embodiment of a CMOS operational amplifier according to our invention, in which parts the same as those in FIG. 8 have the same ...
  Low power digital CMOS compatible bandgap reference
The following description of the invention will often refer to exact numerical values used in analyzing the invention. This is done solely to demonstrate the advantages ...
  Touchpad providing screen cursor/pointer movement control
What is claimed is: 1. A capacitance touchpad for determining user-authorization of a device having a display screen, followed by providing an electrical output signal ...
  High-speed on-chip windowed centroiding using photodiode-based CMOS imager
The present disclosure describes an on-focal plane centroid computation circuit that is compatible and integrated with CMOS imagers implemented in conventional or ...
  Low-cost circuit board materials and processes for area array electrical interconnections over a large area between a device and the circuit board
One embodiment of the present invention is an electronic device and coupled flexible circuit board. The electronic device is coupled to the flexible circuit board by a ...
  Parallel SELEX.TM.
OF THE INVENTION The Parallel SELEX.TM. process provides product libraries which are formed by combining a pool of first chemical reactants coupled to a nucleic acid ...
  Method of making a magnetoelectronic device
An object of the present invention therefore is to provide an improved architecture for a hybrid Hall Effect device to be used as a memory cell in a memory array. A ...
  Method of manufacturing a semiconductor device having interconnetion patterns
One object of the present invention is to form a very minute interconnection pattern having line width less than that of an interconnection pattern formed using a ...

0.004

Archive: All patents - Links

Copyright (c)2006 Eipa-patents.org - All rights reserved