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Details
Inventors: Nomoto, Tsutomu; Yosida, Mamoru; Mouri, Mikio; Watanabe, Tsukasa;
Assignee: Oki Electric Industry Co., Ltd. (Tokyo, JP)
Primary Examiner: Hearn; Brian E.
Assistant Examiner: Wilczewski; M.
Attorney, Agent or Firm: Wenderoth, Lind & Ponack

In a thin-film transistor fabrication process using an amorphous silicon semiconductor layer, after the gate insulation layer is formed and before the a-Si semiconductor layer is formed, the surface of the gate insulation layer is treated with an H.sub.2 plasma. This treatment improves the transistor characteristics.

DETAILED DESCRIPTION The present invention provides a thin-film transistor fabrication process in which, after the gate insulation layer is formed and before the a-Si semiconductor layer is formed, the surface of the gate insulation layer is treated with an H.
sub.
2 plasma.
The H.
sub.
2 plasma treatment has been found to improve the switching ratio, electron mobility, and threshold voltage characteristics of the thin-film transistor.



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