Chroma lock detector

DETAILED DESCRIPTION A chroma lock detector circuit monitors charge pump control signals within a phase-lock loop to determine when two input signals to the phase-lock loop are locked together in phase.
An output signal is generated by the chroma lock detector circuit which is active when the two input signals are locked together in phase and inactive when the two input signals are not locked together in phase.
The charge pump control signals are generated by a phase detector circuit within the phase-lock loop in response to a difference in phase between the two input signals.
Once the two input signals are locked together in phase, the charge pump control signals will become inactive.
When the charge pump control signals are inactive for a predetermined period of time, signalling that the two input signals are locked together in phase, the output of the chroma lock detector circuit is activated and will remain active until the charge pump control signals are again active.
A current source is enabled when either of the control signals are active.
The current source builds up a first level of charge on a first capacitor during the burst period.
A detecting circuit monitors the first level of charge to determine when it rises above a first threshold value.
A second level of charge is built up on a second capacitor when the first level of charge is above the first threshold value.
An output circuit is coupled to the second capacitor for generating an output signal which is activated when the second level of charge rises above a second threshold value and deactivated when the second level of charge falls below a third threshold level.
When the output signal is active the two input signals are locked together in phase.