Copy timing control circuit for double-deck video cassette recorder

DETAILED DESCRIPTION The present invention generally aims to provide a copy timing control circuit capable of concurrently controlling a copy operation timing of one video deck by application of control signals supplied from a mode switch of the other video deck as well as a timing signal thereof.
According to a preferred embodiment of the present invention, a copy timing control circuit in a double-deck video cassette recorder having at least two video cassette decks capable of tape-to-tape copying of video data therebetween, is provided with a mode signal input means for receiving a plurality of mode selection signals produced by application of mode switches in either one of the video cassette decks, a copy signal input means for receiving a copy signal produced by application of a copy key, a control means operably connected to the mode signal input means and the copy signal input means, for producing a servo control signal dependent upon receipt of a given state of the mode selection signals and said copy signal, and motor driving means, connected to receive the servo control signal, for controlling the drive of the respective video cassette deck in response to the servo control signal.