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 Digital circuit for providing a binary signal on the occurrence of a predetermined frequency ratio of two signals

Details
Inventors: Elmis, Herbert; Klar, Adrian;
Assignee: ITT Industries, Inc. (New York, NY)
Primary Examiner: Murray; Richard
Assistant Examiner:
Attorney, Agent or Firm: Lenkszus; Donald J.

The invention provides a digital circuit for generating a binary signal output when a predetermined frequency ratio, v=f1/f2, of two signals F1 and F2 occurs during a selected measuring period. The circuit is particularly adapted for use in a color television receiver to determine the ratio between the chrominance-subcarrier frequency and the horizontal frequency, which ratio is fixed at the transmitting end, both in the PAL system and the NTSC system.

DETAILED DESCRIPTION What is claimed is: 1.
A digital circuit for determining when a predetermined frequency ratio occurs between a first signal at a first frequency and a second signal at a second frequency, said first frequency being higher than said second frequency, and for providing a digital output signal when said ratio occurs over a measuring period, said circuit comprising: first means for counting the number of pulses of said first signal which occur during a predetermined period and for providing a first output signal when a predetermined count is reached, said predetermined count being offset from a first count corresponding to said predetermined ratio, said first output signal having a duration which has a predetermined relationship to the time required to count from said predetermined count to said first count; second means for counting successive pulses of said second signal, said second means counting in a first direction when said pulses of said second signal occur in coincidence with said first output signal and counting in the reverse direction otherwise, and for providing a first signal state at an output when a second predetermined count is exceeded in said first direction; and third means for counting successive third pulses to establish said measuring period and for providing said digital output signal when a predetermined number of successive ones of said third pulses occur when said output has said first signal state, said third pulses having a predetermined relationship to said second signal.
2.
A digital circuit in accordance with claim 1, comprising: logic means responsive to said digital output signal, said second signals and said output for controlling said first counting means.
3.
A digital circuit in accordance with claim 1, wherein said second counting means becomes locked up when a first predetermined count is reached to continuously provide said first signal state at said output.
4.
A digital circuit in accordance with claim 3, wherein said third counting means continuously provides said digital output signal after said predetermined number is reached



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