 System and a process for recording cartographic information on a videodisk |
| The embodiments of the invention in which an exclusive property or privilege is claimed are defined ... |
|
| Optical information recording apparatus |
| It is an object of this invention to prevent errors of code discrimination which tends to occur ... |
|
| Loading and ejecting device for a disk player |
| OF THE PREFERRED EMBODIMENT Referring to FIGS. 1 and 2, a disc player comprises a casing 300 ... |
|
| Anti-static support for a cartridge in a disk drive |
| The electrostatic forces generated by the accumulation of static on the cartridge assembly are ... |
|
| Optical disc cartridge which protects a disc therein from ambient light |
| Accordingly, an object of the present invention is to provide an optical disc cartridge which ... |
|
| Optical record carrier and apparatus for reading it |
| It is the object of the present invention to increase the information density in a record carrier ... |
|
| Optical disc apparatus with access system having object lens control |
| It is an object of this invention to provide an access system which can remove the vibration of the ... |
|
|
High capacity run-length-limited coding system employing asymmetric and even-spaced codes
| Details |
Inventors: Melas, Constantin M.; Rugar, Daniel; Sutardja, Pantas; Wood, Roger W.;
Assignee: Intenational Business Machines Corporation (Armonk, NY)
Primary Examiner: Hajec; Donald T.
Assistant Examiner: Le; Thien Minh
Attorney, Agent or Firm: Baker, Maxham, Jester & Meador
A system for encoding and decoding binary data in a data transmission system, such as a magnetic or optical data storage channel. The encoding process is implemented as a two-step RLL coding procedure wherein the original user bit data are first encoded as an asymmetric RLL code signal at a reduced clock rate and then translated to a second even-spaced RLL code signal suitable for recording to a data storage medium at a full-speed clock rate. The system also provides for recovering suitable even-spaced RLL codes recorded at a full-speed clock rate, translating the recovered even-spaced RLL code signal to an asymmetric RLL code signal at a reduced clock rate, and then decoding the asymmetric RLL code signal to recover the original user bit data. A preferred embodiment uses a rate 2/5 (2, 16, 2) even-spaced RLL code at a full-speed clock rate and a rate 4/5 (0,7; 1,8) asymmetric RLL code at a half-speed clock rate. The rate 4/5 asymmetric RLL code has a high capacity and the rate 2/5 even-spaced RLL code has a wide detection window. The intercode translation procedure requires only simple time-delay circuitry. |
|
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The (2, 16, 2) Even-Spaced RLL Code The rate 2/5 (2, 16, 2) RLL encoder can be embodied as a finite-state machine with 23 states, as shown in FIG.
4.
The state information can be stored as five bits.
From current state information and two input data bits, the encoder generates a 5-bit code word and a 5-bit next-state value.
The encoder functions can be implemented as a simple read-only-memory (ROM)-based circuit or as Boolean logic.
Because there are many acceptable assignments of 5-bit patterns designating the encoder states and of two-bit input data patterns for the code words at each states, the code table shown in FIG.
4 is merely exemplary.
The rate 2/5 (2, 16, 2) RLL decoder is a sliding block decoder that determines the correct two-bit input data corresponding to the current code word based upon the contents of a window containing the current code word and the subsequent three code words.
This decoder function is simplified through the use of code word reassignment, which, is further discussed in the above-cited Lynch et al.
patent.
With code word reassignment, the eight valid code words of length five are represented by eight three-bit labels.
Because the fourword window is then only 12-bits long, the decoder may then be implemented in a 4k by 2 ROM.
The rate 2/5 (2, 16, 2) RLL code provides an improved maximum run length (k) constraint relative to the rate 2/5 (2, 18, 2) RLL code discussed in the above-cited Rugar et al.
reference while preserving the 2/5 rate and the single input-bit error propagation limit with slightly reduced complexity and slightly improved coding efficiency.
The discussion herein accordingly relies on the (2, 16, 2) RLL code, but could just as well consider the example of the rate 2/5 (2, 18, 2) RLL code in connection with this invention.
Two-Level Waveform Conventions A two-level RLL waveform, such as a magnetization pattern on a disk, can be described as a sequence of positive integers representing the number of clock pulses between successive transitions (run length coding)
|
|
TV Signal 
