Method and apparatus for generating video signals

DETAILED DESCRIPTION In accordance with the present invention, higher speed flicker-free images are provided by maintaining parallel digital pixel processing through the output of the look-up table, and only at a final output stage converting to an analog serial bit stream.
The effective pixel rate is then approximately the number of parallel channels times the rate permitted by the individual devices.
In a preferred embodiment, a four-pixel wide data path is maintained from the BMM array output until the data is processed by digital-to-analog converters (DAC).
The output of each BMM plane is converted to a four-pixel wide path running at 1/4 of the pixel display rate.
From this point, the data from each BMM plane is sent to a video multiplexer via a video bus.
Color look-up tables are programmed by a host processor to select the appropriate color codes for display.
Data is input to each of four color look-up tables respectively associated with the four pixels of data being processed in parallel.
Color codes are read as digital data from the four color look-up tables, and the color code data is then multiplexed up to the pixel rate and fed into the inputs of the DAC to drive a display device such as a CRT monitor.
By processing four pixels in parallel, pixel rates as high as 400 MHz can be achieved.
This permits a flicker-free 2048 by 2048 pixel color display.
With greater parallelism, greater dimensions can be accommodated.