Method and apparatus for reducing noise in a video signal

DETAILED DESCRIPTION I claim: 1.
A method of reducing noise in a video signal, comprising: passing said video signal through a high pass filter to create a high frequency signal; passing said high frequency signal through a limiter to produce a first signal; delaying said first signal to produce a second signal; subtracting said second signal from said first signal to produce a difference signal; subtracting said difference signal from said video signal such that any noise in said video signal is reduced.
2.
A method according to claim 1 in which the step of delaying said first signal further comprises using a field delay circuit to delay said first signal.
3.
A method according to claim 1 in which the step of delaying said first signal further comprises using a frame delay circuit to delay said first signal.
4.
A method according to claim 1 further comprising the steps of converting said first signal from an analog signal to a digital signal prior to delaying said first signal and converting said delayed signal from a digital signal to an analog signal prior to subtracting said second signal from said first signal.
5.
A circuit for reducing noise in a video signal, comprising: a high pass filter through which said video signal is passed to produce a high frequency signal; a limiter through which said high frequency signal is passed to produce a first signal, means for delaying said first signal to produce a second signal; means for subtracting said second signal from said first signal to produce a difference signal; means for subtracting said difference signal from said video signal such that any noise in said video signal is reduced.
6.
A circuit according to claim 5 in which the means for delaying said first signal comprises a field delay circuit.
7.
A circuit according to claim 5 in which the means for delaying said first signal comprises a frame delay circuit.
8.
A circuit according to claim 5 further comprising an analog to digital converter located between said limiter and said means for delaying said first signal and a digital to analog converter located between said means for delaying said first signal and said means for subtracting said second signal from said first signal