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Details
Inventors: Naimpally, Saiprasad V.;
Assignee: North American Philips Consumer Electronics Corp. (Knoxville, TN)
Primary Examiner: Chin; Tommy P.
Assistant Examiner:
Attorney, Agent or Firm: Briody; Thomas A., Streeter; William J., Rich; Marianne R.

Only every third line is utilized for the picture-in-picture feature. Each third line is a function of weighted contributions from the present line and the two previous lines. The third lines are weighted by a factor 1-2a, while the remaining two lines will each be weighted by a factor a. The circuit for implementing this equation consists of a first and second multiplier multiplying each of the incoming filter signals by a and 1-2a, respectively. Throughout the middle line, the (1-2a) multiplied input is applied to one input of a summing circuit, while for the remaining lines the same summing circuit input is applied to the terminal furnishing the input signal multiplied by a. The second summing input receives a "0" during the lines following the valid line, and the output of a delay unit during the remaining two lines. The input to the delay unit is connected to the summing circuit output. The desired output signals, properly weighted, are available every third line at the summing circuit output.

DETAILED DESCRIPTION I claim: 1.
In television filter apparatus receiving sequential pixel value signals during successive line intervals, apparatus for creating filtered signals comprising predetermined combinations of weighted vertically adjacent pixel signals during every n.
sup.
th one of said successive line intervals, comprising: means for multiplying each of said received pixel signals by a weighting constant, thereby creating weighted pixel signals; summing means having a first summing input, a second summing input and a summing output for furnishing summing output signals corresponding to the sum of signals applied at said first and second summing inputs; means for connecting said first summing input to said multiplying means; delay means connected to said summing output for delaying said summing output signals by a line interval, thereby creating delayed signals; means for furnishing a "0" signal; and first switch means connected to said delay means for applying said "0" signal to said second adding input during line intervals immediately following each of said n.
sup.
th ones of said successive line intervals, and applying said delayed signals to said second summing input during the remainder of said successive line intervals.
2.
Apparatus as claimed in claim 1, wherein each of said weighted vertically adjacent pixel signals is weighted by a multiplier a; and wherein said first predetermined constant is a.
3.
Apparatus as set forth in claim 2, wherein a=1/3.
4.
Apparatus as claimed in claim 1, wherein every n.
sup.
th one of said successive line intervals is every third one of said successive line intervals; wherein said multiplying means comprises means for multiplying selected ones of said received pixel signals by a first weighting constant, and the remainder of said received pixel signals by a second weighting constant; said means for connecting further comprising second switch means for selectively applying a received pixel signal multiplied by said first or said second weighting constant to said first summing input



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