Synchronizing circuit for a television receiver

DETAILED DESCRIPTION What is claimed is: 1.
A synchronizing circuit for a television receiver comprising: a synchronizing-separating stage for deriving line and field synchronizing pulses from a received television signal, a crystal controlled oscillator for generating a periodic clock signal, the frequency of which is substantially higher than the line frequency of said television signal, a frequency divider circuit connected to the oscillator for deriving a deflection drive signal for a line deflection circuit at the line frequency by dividing the clock frequency by a divisor, and a phase comparison stage for determining the phase deviation between the received line synchronizing pulses and a locally generated reference signal having the line frequency, the phase comparison stage establishing during a predetermined number of line periods the average value of the phase deviation between the signals applied to it, and for supplying the value obtained to a preset stage for adjusting in a time interval subsequent thereto the divisor of the frequency dividing circuit.
2.
A circuit of claim 1, wherein the adjustment of the divisor is effected by changing the duration of a line period.
3.
A circuit according to claim 1 or 2, wherein the time interval in which adjustment of the divisor is effected is one line period during the field blanking interval.
4.
A circuit according to claim 3, wherein the number of line periods in which the average value of the phase deviation is established is 256.
5.
A circuit according to claim 1, wherein the phase comparison stage includes a counter for counting clock periods between the instant of occurrence of a line synchronizing pulse and the instant of occurrence of a reference pulse.
6.
A circuit according to claim 5, wherein the counter is an up-down counter which is enabled by one of the pulses applied to the phase comparison stage.
7.
A circuit according to claim 1, wherein the phase comparison stage establishes the phase deviation defined by an edge of a received line synchronizing pulse and the time corresponding to the middle of a reference pulse, said stage applying half of the average phase deviation obtained during said number of line periods to the preset stage