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Video adapter circuit for detection of analog video scanning formats
| Details |
Inventors: Reddy, Chandra S.;
Assignee: Sage, Inc. (Santa Clara, CA)
Primary Examiner: Faile; Andrew I.
Assistant Examiner: Hrozenchik; Mark W.
Attorney, Agent or Firm: Haverstock & Owens LLP
A video adapter circuit for adapting analog video signals provided by a personal computer system designed to drive a CRT display monitor into signals appropriate for driving a flat panel display monitor. The video adapter circuit accepts analog video and synchronizing signals in any one of several scanning formats commonly utilized in personal computer systems and automatically detects the scanning format of the signals. An oscillator generates a clock signal that is synchronized with the HSYNC signal generated by the personal computer system. Each of the analog RGB video signals are amplified by a video amplifier and sampled, according to the clock signal, by an analog-to-digital converter. A controller circuit compresses the sampled video signals and stores the compressed data in a dual-port video frame memory at a rate determined by the scanning format. The compressed data is retrieved and decompressed from the video frame memory at a rate determined by the requirements of the flat panel display monitor and converted into a format appropriate for driving the flat panel display monitor. If the received video signals have a resolution that is lower than the resolution provided by the flat panel display monitor, the video adapter circuit automatically expands the image to fill the entire image area of the flat panel display monitor. An on-screen menu provides a user interface for the video adapter circuit, including an ability to adjust the brightness and contrast ratio of the image displayed on the flat panel display monitor by adjusting the dc level and the gain of the video amplifier. In addition, the horizontal and vertical position of the displayed image can be adjusted. |
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DETAILED DESCRIPTION OF THE INVENTION FIG.
1 illustrates a block schematic diagram of the flat panel display video adapter of the present invention.
An integrated circuit controller 100 is coupled to an analog-to-digital converter 102, to a video frame memory 104, to a user interface 106, to a flat panel display monitor 108, to a micro controller 110 and to a clock generator 112.
A memory 114 is coupled to the micro controller 110.
Preferably, the controller 100, the analog-to-digital converter 102, the video frame memory 104, the micro controller 110, the clock generator 112 and the memory 114 are mounted to a printed circuit board 116.
The printed circuit board 116 also includes a power supply 118 for providing power to the circuits coupled to the printed circuit board 118.
Operation of the video adapter of the present invention is primarily controlled by the controller 100.
Preferably, the controller 100 is an application specific integrated circuit (ASIC), but could be another controller, such as a general purpose processor that operates according to a stored software program.
A variety of flat panel display monitors are commercially available having a variety of different characteristics, pixel formats and signal requirements.
Therefore, the video adapter of the present invention includes an ability to easily adapt to these various flat panel displays.
In addition, communication with the host computer preferably conforms to one of the Display Data Channel (DDC) standard interface protocols.
CRT display monitors typically operate according to one of several standardized interface protocols specified by the Video Electronics Standards Association (VESA) for communicating between the host computer and the display monitor.
Data stored in non-volatile memory in a conventional CRT is read by the host computer so that the host computer can provide appropriate video signals to the CRT.
The present invention provides this data to the host computer so that the presence of the present invention will be transparent to the host computer
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TV Signal 
