Phase lock loop having switchable filters and oscillators |
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Voltage controlled oscillator operable over a large frequency range |
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Mobile communicator system |
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Finlock alignment mechanism for rockets |
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Communications system |
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Method and apparatus for over-the-air programming of telecommunication services |
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Authenticating the identity of an authorized person |
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Synthesis of improved zero-impedance converter |
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Low noise digital to signal interval converter with audio applications |
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Method and system for detecting in-band jammers in a spread spectrum wireless base station |
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Full-duplex speakerphone circuit including a control interface
| Details |
Inventors: Hemkumar, Nariankadu D.; Wilson, Brent W.;
Assignee: Crystal Semiconductor Corporation (Austin, TX)
Primary Examiner: Chan; Wing F.
Assistant Examiner:
Attorney, Agent or Firm: Koestner; Ken J., Rutkowski; Peter T.
A full-duplex communication device includes a transmit channel, a receive channel, and echo cancellers connected between the transmit channel and the receive channel. A plurality of control parameters and status indicators are defined for both channels. The plurality of control parameters are accessed via a writable interface for controlling operations of the communication device. Typically the control parameters are modified, enabled, and disabled based on an implemented control method and based on signal conditions, including noise, echo, tone, and other abnormal noise conditions. A writable access port enables a user to request tweaking, modification, enabling, and disabling of multiple features and controls. A readable/writable access port enables access to multiple status parameters that are indicative of the status of the communication device and channel operating conditions. |
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DETAILED DESCRIPTION In accordance with the present invention, a full-duplex communication circuit including a control interface is provided for full-duplex, hands-free communication. The communication circuit includes a signal path, a half-duplex controller coupled to the signal path, a writable access port, and a controller interface coupled to the access port and coupled to the half-duplex controller. The controller interface includes a writable register having a half-duplex mode enable/disable field. The half-duplex mode enable/disable field controls the half-duplex controller to enable and disable half-duplex mode operation. In accordance with another aspect of the present invention, a full-duplex communication circuit includes a receive signal path with a receive half-duplex controller coupled to the receive signal path, and a transmit signal path with a transmit half-duplex controller coupled to the transmit signal path. The circuit also includes an echo canceller with an adaptive filter coupled to the transmit signal path and coupled to the receive signal path for accessing a first signal, determining a compensation signal from the first signal, and compensating a second signal using the compensating signal to form a compensated second signal having a loop gain reduction. A controller interface is coupled to a writable access port and to the half-duplex controller. The controller interface includes a writable register having a field for controlling operation of the adaptive filter. In accordance with still another aspect of the present invention, a full-duplex communication circuit includes a signal path, a suppressor coupled to the signal path, a writable access port, and a controller interface coupled to the access port and the suppressor. The controller interface includes a writable register having suppressor threshold field. The suppressor threshold field controls the suppressor to set a speech detection threshold for disengaging suppression.
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