Semiconductor memory device with a controlled precharging arrangement

DETAILED DESCRIPTION Ihe present invention is directed to solve the problems pointed out with respect to the prior art semiconductor memory device, and has for its object to provide an improved semiconductor memory device capable of charging up the bit lines by a MOSFET which is under an immediate control by a writing-in control signal line when no writing-in is performed in the memory cell, wherein the charging-up of the bit lines and the outputting of the written information to the bit lines are controlled so as not to occur at one time or overlap timingly, thereby ensuring that no collision occurs at the time of writing between the writing information and the charging voltage.
Thus the operational speed is increased, and the consumption of electricity is minimized.
Other objects and advantages of the present invention will become apparent from the detailed description given hereinafter; it should be understood, however, that the detailed description and specific embodiment are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.
According to one aspect of the present invention, there is provided a semiconductor memory device which comprises: a memory cell constituted by MOSFETs; a bit line for transmitting a writing and a reading information to or from the memory cell therethrough; a writing-in control signal line for controlling the writing operation onto the memory cell; a first conductive type MOSFET with the source thereof being connected to a power supply terminal, with the gate thereof being connected to the writing-in control signal line, and with the drain thereof being connected to the bit line; the first conductive type MOSFET being adapted to charge up the bit line when no writing is performed in the memory cell; and a second conductive type MOSFET with the drain (or source) thereof being connected to the bit line, with the gate thereof being connected to the writing-in control signal line, and with the source (or drain) thereof being connected to the output terminal of the writing circuit; and the second conductive type MOSFET being adapted to transmit to the bit line an output from the writing circuit