Short pulse sequential waveform generator

DETAILED DESCRIPTION I claim: 1.
An apparatus for providing a sequence of short pulses in response to an applied input pulse of a predetermined pulse width and a predetermined rise time, said apparatus comprising transmission line means for dispersionless propagation including a plurality of sections and a terminating section, a plurality of stages each including a section of said transmission line means and semiconductor means connected in shunt across said section of said transmission line means wherein each of said semiconductor means stores charge therein when forward biased and produces a first step voltage in response to an incident step voltage and produces a second step voltage when said stored charge is depleted, bias voltage means coupled to each of said semiconductor means for providing forward bias voltage to each of said semiconductor means, impedance means coupled to said terminating section of said transmission line means, and input means coupled to said transmission line means for coupling said applied input pulse to the first of said plurality of stages and each stage produces an output pulse formed from said first and second step voltage thereby forming a sequence of short pulses wherein the number of short pulses is proportional to the number of semiconductor means in said plurality of stages, the sum of the pulse widths of said short pulses in the sequence is less than the pulse width of the applied input pulse and the rise time of each of said short pulses is less than the rise time of the applied input pulse.
2.
An apparatus as recited in claim 1 in which said bias voltage means includes means for varying the pulse width of each short pulse in the output pulse sequence.
3.
An apparatus as recited in claim 1 in which said bias voltage means further includes means for reducing the number of short pulses in the output pulse sequence.
4.
An apparatus as recited in claim 1 in which said semiconductor means included in each stage includes step recovery diodes.
5.
An apparatus as recited in claim 4 in which said bias voltage means includes a bias voltage source coupled through bias resistors to the cathodes of step recovery diodes