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| An object of the present invention is thus to provide a technique for appropriately adjusting a dot ... |
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| Small-format subsystem for broadband communication services |
| FIG. 1 is block diagram showing a preferred division of typical network-dependent functions 10 and ... |
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| Method and apparatus for calibrating a display using an array of cameras |
| The present invention overcomes many of the disadvantages of the prior art by providing a display ... |
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| Dual disc adapter with downward sloping outside corner wedges |
| The inventors have found that these two diverse sets of needs can be met by a single adapter insert ... |
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| Digital data storage assembly with particular hub adaptor |
| OF THE INVENTION Referring now to FIG. 1 of the drawing figures, there is shown an exploded ... |
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| CMOS to ECL output buffer |
| FIG. 1 illustrates an overall view of a circuit which includes conversion of CMOS voltage levels ... |
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| Processing system with delta-based video data encoding |
| The present invention involves apparatus and methods for providing video, audio, graphics, input/... |
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Digital correlation indicator and hanging dot reduction system employing same
| Details |
Inventors: Harwood, Leopold A.; Chin, Danny; Law, Kirk A.;
Assignee: RCA Corporation (Princeton, NJ)
Primary Examiner: Groody; James J.
Assistant Examiner: Dunnam; Michael P.
Attorney, Agent or Firm: Whitacre; Eugene M., Rasmussen; Paul J., Meagher; William H.
In a color TV receiver, a first digital signal of "m" bits represents high frequency component of combed luminance signal, and a second digital signal of "m" bits represents combed chrominance component. The "k" most significant bits of the first signal (where "k" is less than "m") are fed to respective inputs of a first "or" gate, while the "j" most significant bits of the second signal (where "j" is less than, or equal to, "m") are fed to respective inputs of a second "or" gate. The "or" gate outputs are fed, without delay difference, to inputs of a first "and" gate, and are fed, with a delay difference of 90.degree. at color subcarrier frequency, to inputs of a second "and" gate. Sequence recognition apparatus, responsive to the outputs of both "and" gates, develops a correlation indication in response to existence of predetermined sequences of outputs from one or both "and" gates. Control signal former, responsive to correlation indication, forms control signal for actuating high frequency component suppression in receiver's luminance channel to preclude hanging dot display. |
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DETAILED DESCRIPTION What is claimed is: 1.
In a video signal processing apparatus including a source of a first digital signal of "m" bits representative of a first bipolar signal component, and a second digital signal of "m" bits representative of a second bipolar signal component, a digital correlation indicator comprising: first logic circuit means, responsive to only the "k" most significant bits of said first digital signal, where "k" is less than "m", for outputting a "1" whenever said first digital signal is representative of an excursion of said first bipolar signal component, in either a positive or a negative direction, which equals or exceeds a threshold determined by the "k'th" most significant bit of said first digital signal; second logic circuit means, responsive to only the "j" most significant bits of said second digital signal, where "j" is less than or equal to "m", for outputting a "1" whenever said second digital signal is representative of an excursion of said second bipolar signal component, in either a positive or a negative direction, which equals or exceeds a threshold determined by the "j'th" most significant bit of said second digital signal; an "and" gate having two inputs, one responsive to the output of said first logic circuit means and the other responsive to the output of said second logic circuit means and correlation indication signal developing means responsive to the output of said "and" gate.
2.
Apparatus in accordance with claim 1 wherein said correlation indication signal developing means includes: signal delay means having a plurality of successive signal takeoff points; the amount of delay between successive ones of said takeoff points being the same; the input of said delay means being responsive to the output of said "and" gate; a plurality of signal paths, each connected to a respectively different one of said signal takeoff points; a second "and" gate having a plurality of inputs equal in number to said plurality of signal paths, each of said signal paths terminating at a respectively different one of said plurality of inputs of said second "and" gate; and a control signal former responsive to the output of said second "and" gate
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Television 
